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Our Customized Agenda Module Selector is under construction. Please contact us to discuss your needs and build a custom agenda.

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Workshop Agenda Selection Form

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Please Select All Topics of Interest Please Select All Topics of Interest Versal Adaptive SoC FPGA and Adaptive SoC Languages Device Architecture Tools and Flows Programmable Logic Design Embedded Software Design Algorithm Acceleration DSP Design System Design Verification Signal/Power Integrity

Versal_Adaptive_SoC Versal_Adaptive_SoC Programmable Logic Perspective NOC Embedded Design Perspective AI Engine Design Tools Boot and Platform Management Debugging Hardware Device Interfaces Power and Board Design

FPGA and Adaptive SoC FPGA and Adaptive SoC FPGAs for Managers UltraFast Design Methodology

Languages Languages VHDL Verilog SystemVerilog for Design TCL

Device Architecture Device Architecture Versal Adaptive SoC Zynq UltraScale+ MPSoC RFSoC UltraScale/UltraScale+ 7-Series Virtex-6 Spartan-6 Spartan-6 Design Migration

Tools and Flows Tools and Flows Vivado Design Suite Vivado IP Integrator Vitis IDE Vitis HLS PetaLinux Yocto Project Dynamic Function Exchange Model Composer

Programmable Logic Design Programmable Logic Design Essentials of Programmable Logic Design Advanced Programmable Logic Design Advanced XDC and Timing Analysis Advanced Design Techniques Advanced Timing Closure UltraFast Design Methodology Debugging AMD and FPGA, SoC and Adaptive SoC Hardware Designs

Embedded Design Embedded Design Adaptive SoCs for System Architects Building Applications in MPSoC Embedded Systems Design Techniques Operating Systems and Hypervisors Designing with PetaLinux Designing with Yocto Project

Algorithm Acceleration Algorithm Acceleration Accelerating Software Applications in Vitis Algorithm Optimization Accelerator Kernels Using Versal AIEngine Alveo Cards for Accelerate

DSP Design DSP Design DSP Primer Building High Performance DSP Functions

System Design System Design Designing PCIe Systems Developing AI Inference Solutions Developing Multimedia Solutions Vision Based Applications with Kria

Verification Verification Advanced VHDL for Verification SystemVerilog for Verification Verilog Assertions UVM

Signal/Power Integrity Signal/Power Integrity Gigabit Channel Design and Modeling Versal Power and Board Design

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