Workshops

Versal ACAP

Programmable Logic Perspective
NOC
Embedded Design Perspective
AI Engine
Design Tools
Boot and Platform Management
Debugging Hardware
Device Interfaces
Power and Board Design

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FPGA and ACAP Design Methodologies

FPGAs for Managers
UltraFast Design Methodology

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Languages

VHDL
Verilog
SystemVerilog for Design
TCL

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Device Architecture

Versal ACAP
Zynq UltraScale+ MPSoC
RFSoC
UltraScale/UltraScale+
7-Series
Virtex-6
Spartan-6
Spartan-6 Design Migration

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Tools and Flows

Vivado Design Suite
Vivado IP Integrator
Vitis IDE
Vitis HLS
PetaLinux
Dynamic Function Exchange
Model Composer

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Essentials of Programmable Logic Design
Advanced Programmable Logic Design
Advanced XDC and Timing Analysis
Advanced Design Techniques
Advanced Timing Closure
UltraFast Design Methodology
Debugging AMD-Xilinx Hardware Designs

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Embedded Software Design

Adaptive SoCs for System Architects
Building Applications in MPSoC
Embedded Systems Design Techniques
Operating Systems and Hypervisors
Designing with PetaLinux

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